[Cryptography] RISC-V isn't the answer

[Ben Laurie]

On 25 January 2018 at 05:46, Peter Gutmann <pgut001 at cs.auckland.ac.nz>
wrote:

> Tony Arcieri <bascule at gmail.com> writes:
>
> >For an architecture like lowRISC (based on Berkeley's Rocket RISC-V core,
> I
> >believe), the answer is, for every word of memory (i.e. 64-bits) include a
> >set of attribute bits that control a number of rich attributes.
>
> How are you going to convince memory manufacturers to add the extra bits to
> their memory chips?  Or memory access controller designers to design custom
> controllers to deal with the extra bits?  Or customers to pay the same rate
> for 10% (or whatever) less usable RAM?
>

Right, because no-one ever paid a different price for different
functionality. This is why all computers are the same price, spec and
performance today.
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