[Cryptography] RISC-V isn't the answer
Tony Arcieri
bascule at gmail.com
Thu Jan 25 12:50:34 EST 2018
On Thu, Jan 25, 2018 at 2:46 AM, Peter Gutmann <pgut001 at cs.auckland.ac.nz>
wrote:
> How are you going to convince memory manufacturers to add the extra bits to
> their memory chips? Or memory access controller designers to design custom
> controllers to deal with the extra bits? Or customers to pay the same rate
> for 10% (or whatever) less usable RAM?
>
For SoCs with onboard RAM this isn't an issue.
For slotted ram, the memory controller can still use page-level attributes
ala KPTI. The tricky part is cache, and that can have the tag bits (as an
alternative to a partitioned cache others were proposing).
--
Tony Arcieri
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