[Cryptography] [IP] 'We cannot trust' Intel and Via's chip-based crypto, FreeBSD developers say

[Bill Cox]

On 12/25/2013 6:27 AM, dj at deadhat.com wrote:
> It would be normal to add characterization circuits to chips to 
> measure the properties of the silicon during and after manufacture. 
> But if you were doing your own layout, leaving space for these would 
> be part of the design rules. Is there anything substantive to suggest 
> it was something else? 

I heard this second hand, but the guy at the time was pretty freaked 
out.  I never heard what became of this story.  Characterization 
transistors are normally added in small gaps between die, not on the die 
itself.  Xilinx does a good job of using all the available area for 
circuitry, even putting transistors in the corners where almost every 
other die you'll see has nothing but wasted space, and some 45-degree 
turns for IO power busing.  The extra transistors were added in some of 
the few remaining spaces that Xilinx didn't fill. The fact that I never 
heard about this again probably means it either was not malicious or our 
guys decided not to make it public for some reason.