MIT talk: Special-Purpose Hardware for Integer Factoring

Steven M. Bellovin smb at cs.columbia.edu
Wed Sep 14 12:29:39 EDT 2005


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Open to the Public
                                                                                
DATE:    TODAY * TODAY * TODAY * WEDNESDAY, Sept. 14 2005
TIME:    4:00 p.m. - 5:30 p.m.
PLACE:   32-G575, Stata Center, 32 Vassar Street
TITLE:   Special-Purpose Hardware for Integer Factoring
SPEAKER: Eran Tromer, Weizmann Institute
                                                                                
Factoring of large integers is of considerable interest in
cryptography and algorithmic number theory. In the quest for
factorization of larger integers, the present bottleneck lies in the
sieving and matrix steps of the Number Field Sieve algorithm. In a
series of works, several special-purpose hardware architectures for
these steps were proposed and evaluated.
                                                                                
The use of custom hardware, as opposed to the traditional RAM model,
offers major benefits (beyond plain reduction of overheads): the
possibility of vast fine-grained parallelism, and the chance to
identify and exploit technological tradeoffs at the algorithmic level.
                                                                                
Taken together, these works have reduced the cost of factoring by many
orders of magnitude, making it feasible, for example, to factor
1024-bit integers within one year at the cost of about US$1M (as
opposed to the trillions of US$ forecasted previously). This talk will
survey these results, emphasizing the underlying general ideas.
                                                                                
Joint works with Adi Shamir, Arjen Lenstra, Willi Geiselmann, Rainer
Steinwandt, Hubert K?pfer, Jim Tomlinson, Wil Kortsmit, Bruce Dodson,
James Hughes and Paul Leyland.


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		--Steven M. Bellovin, http://www.cs.columbia.edu/~smb



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